Starting from December 2015, I am no longer affiliated with KTH and I will not update this page. However, you can still contact me using my KTH email address.
I am a researcher in the department of Electronics and Embedded Systems (ESY) in the ICT school of KTH (Royal Institute of Technology, Sweden).
Research Interests
System-Level Modeling and Design of Embedded and Cyber-Physical Systems
Automatic Construction of Design-Space Exploration Problems
Functional Programming
Lately, my research has been mainly centered around the ForSyDe (Formal System Design) methodlogy. I am the main contributor and maintainer of the SystemC implementation of ForSyDe.
I was/am also involved in the European projects SYSMODEL , iFEST , and CONTREX .
Educational Background
PhD in Electronic and Computer Systems, 2009-2014, KTH (Royal Institute of Technology, Sweden).
Under supervision of Dr. Ingo Sander and Prof. Axel Jantsch.
Thesis: Managing the Complexity in Embedded and Cyber-Physical System design [link]Master of Science in System-on-Chip Design, major: system and architecture, 2006-2008, KTH (Royal Institute of Technology, Sweden).
Thesis: Design Space Exploration Of Field Programmable Counter Arrays And Their Integration With FPGAs [pdf]
Bachelor of Electrical Engineering, major: electronics, 2001- 2006, K.N.Toosi University of technology.
Thesis: Parallel implementation of a multilayer perceptron neural network
Technical skills
System and hardware design using reconfigurable platforms (FPGAs, ASIPs)
Digital Hardware design (RTL Modelling and Verification)
Embedded programming
Real-Time operating systems
Electrical systems simulation�(Spice)
PCB design
Parallel programming using message passing libraries
Desktop and web programming on various platforms with different languages
Teaching Experiences
Embedded System design using FPGAs (Novin-tarashe Company - summer 2007 )
VHDL and FPGA introductory courses (IRIB - winter 2004, Azad university - spring 2005, Novin-tarashe Company - summer 2008)
Introduction to electrical engineering softwares(PSpice, Protel) (Novin-tarashe Company - summer 2005)
Computer programming for Electrical engineering course(as teaching assistant) (K.N.Toosi University of Technology- fall 2002)
Using IT in educational systems, ICDL skills and elementry web design (AITI - 2002-2005)
Publications
| [1] | Seyed-Hosein Attarzadeh-Niaki and Ingo Sander. Integrating functional mock-up units into a formal heterogeneous system modeling framework. In International Symposium on Computer Architecture and Digital Systems (CADS), To appear, October 2015. [ bib ] |
| [2] | Papa Issa DIALLO, Seyed-Hosein Attarzadeh-Niaki, Francesco Robino, Ingo Sander, Joel Champeau, and Johnny Öberg. A formal, model-driven design flow for system simulation and multi-core implementation. In Symposium on Industrial Embedded Systems (SIES), Siegen, Germany, June 2015. [ bib ] |
| [3] | Seyed Hosein Attarzadeh Niaki, Ekrem Altinel, Martijn Koedam, Anca Molnos, Ingo Sander, and Kees Goossens. A composable and predictable MPSoC design flow for multiple real-time applications. In Workshop on Model-Implementation Fidelity (MiFi), March 2015. [ bib ] |
| [4] | Seyed Hosein Attarzadeh Niaki, Marcus Mikulcak, and Ingo Sander. Automatic generation of virtual prototypes from platform templates. In Marie-Minerve Louërat and Torsten Maehne, editors, Languages, Design Methods, and Tools for Electronic System Design, volume 311 of Lecture Notes in Electrical Engineering. Springer International Publishing, 2015. [ bib ] |
| [5] | Seyed Hosein Attarzadeh Niaki, Marcus Mikulcak, Francesco Robino, and Ingo Sander. A framework for characterizing predictable platform templates. Technical Report 14:01, KTH, Electronic Systems, 2014. [ bib ] |
| [6] | Seyed Hosein Attarzadeh Niaki and Ingo Sander. An automated parallel simulation flow for heterogeneous embedded systems. In Proceedings of the Conference on Design, Automation and Test in Europe, DATE '13, pages 27--30, San Jose, CA, USA, 2013. EDA Consortium. [ bib | http | Abstract ] |
| [7] | Fernando Herrera, Seyed Hosein Attarzadeh Niaki, and Ingo Sander. Towards a modelling and design framework for mixed-criticality SoCs and systems-of-systems. In Euromicro Conference on Digital System Design (DSD), pages 989--996. IEEE, 2013. [ bib | DOI | Abstract ] |
| [8] | Seyed Hosein Attarzadeh Niaki, Marcus Mikulcak, and Ingo Sander. Rapid virtual prototyping of real-time systems using predictable platform characterizations. In Forum on Specification Design Languages (FDL). IEEE, 2013. [ bib | Abstract ] |
| [9] | Seyed Hosein Attarzadeh Niaki, Gilmar Beserra, Nikolaj Andersen, Mathias Verdon, and Ingo Sander. Heterogeneous system-level modeling for small and medium enterprises. In Symposium on Integrated Circuits and Systems Design (SBCCI). IEEE, September 2012. [ bib | Abstract ] |
| [10] | Seyed Hosein Attarzadeh Niaki, Mikkel Koefoed Jakobsen, Tero Sulonen, and Ingo Sander. Formal heterogeneous system modeling with SystemC. In Forum on Specification and Design Languages (FDL), pages 160--167. IEEE, September 2012. [ bib | Abstract ] |
| [11] | Gilmar Silva Beserra, Seyed Hosein Attarzadeh Niaki, and Ingo Sander. Integrating virtual platforms into a heterogeneous MoC-based modeling framework. In Forum on Specification and Design Languages (FDL), pages 143--150. IEEE, September 2012. [ bib | Abstract ] |
| [12] | Mikkel Koefoed Jakobsen, Jan Madsen, Seyed Hosein Attarzadeh Niaki, Ingo Sander, and Jan Hansen. System level modelling with open source tools. Nuremberg, Germany, February 2012. [ bib | Abstract ] |
| [13] | Seyed Hosein Attarzadeh Niaki and Ingo Sander. Semi-formal refinement of heterogeneous embedded systems by foreign model integration. In 2011 Forum on Specification and Design Languages (FDL), pages 1--8. IEEE, September 2011. [ bib | Abstract ] |
| [14] | Seyed Hosein Attarzadeh Niaki and Ingo Sander. Co-simulation of embedded systems in a heterogeneous MoC-based modeling framework. In 2011 6th IEEE International Symposium on Industrial Embedded Systems (SIES), pages 238--247. IEEE, June 2011. [ bib | DOI | Abstract ] |
| [15] | Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed Hosein Attarzadeh Niaki, Chrysostomos Nicopoulos, Frank K. Gurkaynak, Philip Brisk, Yusuf Leblebici, and Paolo Ienne. Field programmable compressor trees: Acceleration of Multi-Input addition on FPGAs. ACM Trans. Reconfigurable Technol. Syst., 2(2):1--36, 2009. [ bib | DOI | http | Abstract ] |
| [16] | Seyed Hosein Attarzadeh Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gurkaynak, Yusuf Leblebici, and Paolo Ienne. Design space exploration for field programmable compressor trees. In Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, pages 207--216, Atlanta, GA, USA, 2008. ACM. [ bib | DOI | http | Abstract ] |
| [17] | Seyed Hosein Attarzadeh Niaki. Design space exploration of field programmable counter arrays and their integration with FPGAs. Master's thesis, Royal Institute of Technology (KTH), 2008. [ bib | .pdf ] |
| [18] | Morteza Nourian, Seyed Hosein Attarzadeh Niaki, and Hesamed'din Ilati. Parallel implementation of multi layer perceptron on a linux cluster. In Proc. 14th Iranian Conf. Elect. Eng. (ICEE '06), Amir Kabir Univ. of Technology, Tehran, Iran, May 2006. [ bib ] |
The publication list was generated by bibtex2html 1.98.
