PhD student Wiktor's survey "A Quarter of a Century of Neuromorphic Architectures on FPGAs -- an Overview" has been accepted for publication in ACM Computing Surveys (CSUR)! The article reviews 25 years of FPGA-based neuromorphic systems and discusses where the field is heading. Find the paper here!
Together with colleagues in the ASAP project, we have a new journal article in the Journal of Geophysical Research: Machine Learning and Computation! The paper compares methods for detecting solar structures in images from the Solar Dynamics Observatory (SDO/AIA), and studies how well they work on raw, uncalibrated data -- a key step towards running such detection directly on board a spacecraft. Check the paper here!
Our paper on scalable neuromorphic design has been accepted to Euro-Par 2026! PhD candidate Ihsan shows how spiking neural network simulation can scale beyond a single device by connecting multiple FPGAs in a bidirectional ring topology, combined with a stream-dataflow architecture that keeps the neurons and synapses flowing through the hardware. Check the preprint here!
A second paper from the group has been accepted to MCSoC! PhD candidate Ihsan shows how brain-like neural networks, such as BCPNN, can be accelerated on embedded FPGAs -- covering the full path from online learning to scalable inference on resource-constrained hardware. Check the paper here!
Our paper on evaluating space AI use-cases has been accepted to the IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)! As part of the ASAP project, PhD student Pedro Antunes evaluates four neural-network-based space use cases accelerated on FPGAs, showing what on-board inference can look like on future space missions. Check the paper here!
Spiking convolutional neural networks (SCNNs) combine the energy-efficiency of spiking neurons with the power of convolutional models, but running them fast is a challenge. In this paper, we present IncineRate, a multi-modal FPGA accelerator architecture that accelerates SCNN inference, showing how reconfigurable hardware can be tailored to the sparse, event-driven nature of spiking networks.
Our workshop on coarse-grained reconfigurable architectures (CGRAs) for AI and HPC ran for the fifth year at IPDPS 2026. Thank you to all speakers and attendees who made it a great event! Check out the official site here!
Our workshop on coarse-grained reconfigurable architectures (CGRAs) for AI and HPC is running for the fourth year at IPDPS 2025. If you are going there, make sure to visit us! Check out the official site here!
Space -- the final frontier -- will use neural networks to analyze the increasing amount of data that high-fidelity sensors generate. In this awesome paper, PhD student Pedro Antunes survey what role FPGAs will have in our future space endeavours, discussing trends and opportunities! Check the preprint here!
What role do FPGAs have in brain simulation and neuromorphic engineering, and when can we simulate the whole brain on a single FPGA? PhD student Wiktor answers these and many more questions in this review article about neuromorphic systems on FPGAs! Check the preprint here!
PhD candidate Ihsan shows how FPGAs can be up to a magnitude faster than GPUs and more energy-efficient when running emerging brain-like neural network models, such as BCPNN. The paper was accepted by ARC 2025 in Seville, Spain! Check the preprint here!
PhD candidate Björn's paper on how to reach fast and power-efficient SNN simulation on FPGAs, reaching faster-than-realtime simulation on a well-known cortical microcircuit model while consuming as little as 21 nJ of energy per synaptic event, making our accelerator the most energy efficient for this type of circuit in the world! Accepted to IEEE Access. Check the preprint here!
Ihsan will work in the EU EXTRA-BRAIN project examining the neuromorphic systems in cloud/edge continuum
Together with colleagues from Univ. of Edinburgh and RIKEN, we introduce iFast, a new library-level approach to transparently accelerating scientific applications based on MPI-IO. It decouples application I/O, data caching, and data storage to support heterogeneous storage models. Check the preprint here!
The EU Extra-Brain project will push state-of-the-art in applying brain-inspired (e.g., BCPNN) systems to solve applications in industry. Follow the project: here.
Pedro will work in ASAP project examining the reconfigurable systems in space
Wiktor will work on generating neuromorphic hardware using the Syn2Logic DSL.
Together with colleagues from RIKEN, Intel, IIT, Chalmers, TiTech, and AIST, we explore what it means for future (A64FX-like) processors to grow vertically. Check the full paper here!
The ASAP project will investigate the use of reconfigurable architectures (FPGAs) for use in future deep-space missions.
Björn will work on accelerating neuroscience applications on FPGAs.