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Interested in accelerators, FPGAs, or neuromorphic systems? Do a master thesis project with us!


Group aquires and install a Terasic DE10-Agilex platform that will be used in the 'Building Digital Brains' project granted by VR. Exciting!

September 2022

Proceedings of the first CGRA4HPC workshop, arranged by KTH+RIKEN+Toronto. The workshop disseminates state-of-the-art in CGRA accelerators for HPC.

September 2022

Proceedings of the first CORTEX workshop, arranged by KTH+RIKEN+Belfast+Tennessee, where leading neuroscientist to present opportunities in HPC and brain-like computing.

September 2022

Here we analyze, investigate, and understand the parallel performance (and opportunities) in GROMACS. Presented at PPAM'21

September 2022

Here we disseminate our experience in building a DSL targeting FFTs on-top of MLIR in LLVM. Presented at xDSL'22.

August 2022

Here we analyze communication bounds in the CG method and investigate how they can be reduced. Presented at PASC'22.

July 2022

In this paper we explore the role of workflows for controlling urgent decision making use-cases in HPC settings.

July 2022

Work on creating next-generation CGRAs (KTH+RIKEN) for future HPC systems. Presented at CGRA4HPC'22

June 2022

We (KTH+Riken+Titech+Chalmers+IIT) investigate what a future A64FX-like processor would look and behave like with 1.5nm stacked SRAM.

April 2022

We propose NoaSci, which is a library to simplify using object storage in HPC. Presented at PDP'22.

January 2022

Happy to say that our project proposal on Building Digital Brains has been selected to be funded in the competitive and prestigious VR starting grant call.

December 2021

We show how HPC-systems and simulation can be used to combat Mosquito-borne diseases (e.g., Zika, Chikungunya, and Malaria virus). Accepted to UrgentHPC'21.

November 2021

We review the potential of using HPC and FPGAs to accelerate virtual screening to find new medical candidates to combat (e.g.,) SARS-CoV-2. Published in Pharmaceuticals.

November 2021

Trouble abstracting away all those heterogeneous devices in your system? If so, then MAMBA (KTH+HPE+Bristol+Oxford) might solve your problems!

November 2021

We introduce a new rematerialization method for CFD codes on FPGAs, allowing us to better use computation resources. Published in HPCAsia'21.

October 2021

We show how to strongly scale Nek5000 on modern HPC systems using OpenACC. Published in HPCAsia'21.

October 2021

Our paper on using BCPNN to predicting/understanding particle physics accepted to AI4S'21.

July 2021

We introduce StreamBrain, a high-performance framework for using the brain-inspired BCPNN learning rule on GPUs, CPUs, and FPGAs. Accepted to HEART'21.

June 2021

The NVIDIA A100 GPU has a new feature for asynchronously fetching data, but how good is it and how can we use it? Find out more in our HEART'21 publication.

June 2021

We introduce NEKO, a modernized NEK5000-like code for future supercomputers, supporting CPUs/GPUs/FPGAs/Vector architectures.

GPUs can be used to significantly speed-up parts of radiotherapy treatment plans, which can aid cancer patients. Paper at ASHeS'21.

May 2021

How far are FPGAs from beating GPUs in Spectral Element Method codes? Not too far according to our model. Check out our IPDPS'21 paper.

May 2021

Is the recent surge in incorporating Matrix Engines motivated from an HPC perspective? We (KTH+Titech/RIKEN) investigate and present our findings at IPDPS'21.

May 2021

Can HPC visualization/profiling tools such as Paraver be used to understand FPGA-based performance? We show that they can in our recent publication in IEEE Cluster'20.

September 2020

Together with collagues from RIKEN and TU Darmstadt, we show how OpenMP 4.0+ can efficiently be mapped to modern FPGAs. Presented at IWOMP'20.

September 2020

Having I/O bottlenecks in your Deep-Learning pipelines? Learn how to profile them using methods in our recent paper published in IEEE Cluster'20.

September 2020

What are CGRAs and how can they help future HPC, Cloud, or even consumer-grade computer systems? Find out in our IEEE Access survey!

June 2020

About Us

Welcome to our homepage! We are a recent group that focuses on exploring future computer architectures, such as, for example Reconfigurable Architectures (FPGAs or CGRAs) or Neuromorphic Systems. With the impending termination of Moore's law (transistor scaling), we believe that it is extremely important that we understand how to use such new architecture in order to continue performance scaling in the decades to come.



Docent Artur Podobas

I defended my Ph.D. thesis at KTH Royal Institute of Technology in December 2015. My Ph.D. topic was on the task-based parallel programming model found in common systems such as OpenMP, Intel Cilk, Threading Building Blocks, and more. You can find my Ph.D. dissertation. My Ph.D. supervisors were Prof. Mats Brorsson and Prof. Vladimir Vlassov. My focus was to research and explore the task-based programming model, particularly close to the hardware. For example, I built (among of the first) High-Level Synthesis tools that target automatic hardware generation directly from OpenMP tasks and also researched high-performance runtime systems to efficiently leverage such systems (best paper IWOMP'14). My Ph.D. was funded by two EC projects: ENCORE (led by Barcelona Supercomputing Centre) and PaPP (led by KTH/SICS). After my defense, I spent one year working as a post-doc at Denmark's Technical University (DTU Compute), where I worked in the COPCAMS and continued my work with high-performance OpenMP runtime systems.
In 2016, I received the prestigious JSPS scholarship and traveled to Japan to do a postdoctoral fellowship under Prof. Satoshi Matsuoka's mentorship atMatsulab at the Tokyo Institute of Technology, Japan. During this time, I was fortunate enough to work with fantastic colleagues and students, focusing on building High-Performance Hardware Accelerators using FPGAs. Amongst others, we built one of the fastest 2D and 3D Stencil (a method for numerically solving PDEs) Accelerators on FPGAs to this day. During this time, I also created the first high-performance Posit Arithmetic Unit for FPGAs(capable of running at hundreds of MHz).
In 2019, I was working at RIKEN Centre for Computational Science (R-CCS), which is the largest Japanese research institute and home to the top#1 supercomputer Fugaku (seeTOP500 list). Here, I was working in Prof. Kentaro Sano's Processor Research Division on emerging computer architectures and non-Von-Neumann systems-- one of the leading groups in architecture in Japan.
In 2020-2021, I was working with Prof. Stefano Markidis on various HPC aspects, and was also the work-package 2 leader in the VESTEC project.
Today, I am an Docent in High-Performance Computing, specializing in Hardware Accelerators. You can find my list of articles on Google Scholar

Student Projects

Are you looking for a master's thesis and, at the same time, interested in Post-Moore computer systems such as reconfigurable architectures (FPGAs / CGRAs) or neuromorphic systems? If so, then you are on the right page, and we would be very happy to set up a master project that you could do in our group.

Send a mail to me for more information.