Research
Research Interests
My main research interests are design methodologies for embedded systems that can provide service guarantees for the final implementation. Although difficult to achieve in practice, my vision is to develop a design methodology that provides a correct-by-construction design flow from specification to implementation. Key components for such a design flow are a formal base, analysis methods and target platforms that can provide service guarantees. Of particular interest are the following topics:
- Modeling of heterogeneous embedded systems
- Software design flow for real-time multiprocessor applications
- Design space exploration to find efficient implementations for multiprocessor architectures
- Hardware/software co-design
- Design of mixed-criticality systems
I am the creator and main contributor of ForSyDe (Formal System Design), a design methodology for embedded systems. ForSyDe has a formal foundation in form of models of computation (MoCs) and provides modeling libraries to system designers for different MoCs. Currently we develop tools for design space exploration and software synthesis.
I am also part of the CASTOR Software Research Center at KTH.
Open Positions
There are currently no open positions.
Projects
Current Projects
Past Projects
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TRANSFORM - Design transformation for correct-by-construction design methodology (Vinnova,
Nov 2019 - Oct 2022)
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PANORAMA: Boosting Design Efficiency for Heterogeneous Systems (ITEA3, Apr 2019 - Mar 2022)
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CORRECT: Correct-by-construction design methodology (Vinnova,
Nov 2017 - Feb 2022)
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SAFEPOWER
(H2020, Jan 2016 - Dec 2018)
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CONTREX (Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties) (FP7, 2013-2016)
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EMC2 (Embedded Multi-Core systems for Mixed Criticality applications in dynamic and changeable real-time environments) (Artemis, 2014-2017)
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iFEST (industrial Framework for Embedded Systems Tools) (Artemis, 2010-2013)
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SYSMODEL (System Level Modeling Environment for SMEs) (Artemis, 2009-2011)
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ANDRES (Analysis and Design of run-time Reconfigurable, heterogeneous Systems) (FP6, 2006-2009)
PhD Students
Current PhD Students
I am the main supervisor for the following students:
Past PhD Students
The following PhD students have graduated with me as main supervisor
Post-doctoral researchers
Current post-doctoral researchers
Past post-doctoral researchers
Visiting researchers (Duration: at least four weeks)
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