My main research interests are design methodologies for embedded systems that can provide service guarantees for the final implementation. Although difficult to achieve in practice, my vision is to develop a design methodology that provides a correct-by-construction design flow from specification to implementation. Key components for such a design flow are a formal base, analysis methods and target platforms that can provide service guarantees. Of particular interest are the following topics:
- Modeling of Heterogeneous Embedded Systems
- Software Design Flow for Real-Time Multiprocessor Applications
- Design Space Exploration to find efficient implementations for multiprocessor architectures
- Hardware/Software Co-Design
- Design of Mixed-Criticality Systems
I am the creator and main contributor of ForSyDe (Formal System Design), a design methodology for embedded systems. ForSyDe has a formal foundation in form of models of computation (MoCs) and provides modeling libraries to system designers for different MoCs. Currently we develop tools for design space exploration and software synthesis.
Currently we do not have any open positions.
CORRECT: Correct-by-construction design methodology (Vinnova,
Nov 2017 - Feb 2022)
(H2020, Jan 2016 - Dec 2018)
Current PhD Students
I am the main supervisor for the following students:
and co-supervisor for these students:
Past PhD Students
The following PhD students have graduated with me as
Sandro Penolazzi (main supervisor: Ahmed Hemani) - 2011
Tarvo Raudvere (main supervisor: Axel Jantsch) - 2007
Lu (main supervisor: Axel Jantsch) - 2007
Current post-doctoral researchers
Past post-doctoral researchers
Visiting researchers (Duration: at least four weeks)
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