@article{Ungureanu20:TECS,
author = {Ungureanu, George and Medeiros, Jos\'{e} Edil Guimar\~{a}es De and sundstr\"{o}m, Timmy and S\"{o}derquist, Ingemar and \r{A}hlander, Anders and Sander, Ingo},
title = {ForSyDe-Atom: Taming Complexity in Cyber Physical System Design with Layers},
year = {2021},
issue_date = {December 2020},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {20},
number = {2},
issn = {1539-9087},
url = {https://doi.org/10.1145/3424667},
doi = {10.1145/3424667},
month = jan,
articleno = {10},
numpages = {27},
keywords = {system design language, validation, synthesis, Cyber-physical systems, simulation, design methodology, modeling, models of computation}
}
@inproceedings{Ungureanu20:FDL,
author={Ungureanu, George and Jord\={a}o, Rodolfo and Sander, Ingo},
booktitle={2020 Forum for Specification and Design Languages (FDL)},
title={Exploiting Dataflow Models for Parallel Simulation of Discrete Timed Systems},
year={2020},
pages={1-4},
doi={10.1109/FDL50818.2020.9232931}
}
@inproceedings{Ungureanu19:FDL,
title={Formal Design, Co-Simulation and Validation of a Radar Signal Processing System},
author={Ungureanu, George and Sundstr{\"o}m, Timmy and {\AA}hlander, Anders and Sander, Ingo and S{\"o}derquist, Ingemar},
booktitle={2019 Forum for Specification and Design Languages (FDL)},
pages={1--8},
year={2019},
organization={IEEE}
}
@techreport{Ungureanu19:TechReport,
author = {George Ungureanu and Timmy Sundstr\"{o}m and Anders \r{A}hlander and Ingo Sander and Ingemar S\"{o}derquist},
title = {Design of Sensor Signal Processing with {ForSyDe}: Modeling, Validation and Synthesis},
institution = {KTH Royal Institute of Tehnology},
year = {2019},
url = {https://forsyde.github.io/docs/aesa-radar/},
doi = {10.13140/RG.2.2.21573.81126},
categories = {modeling, design flow, synthesis}
}
@article{Bonna19:TODAES,
title={Modeling and simulation of dynamic applications using scenario-aware dataflow},
author={Bonna, Ricardo and Loubach, Denis S and Ungureanu, George and Sander, Ingo},
journal={ACM Transactions on Design Automation of Electronic Systems (TODAES)},
volume={24},
number={5},
pages={1--29},
year={2019},
publisher={ACM New York, NY, USA}
}
@inproceedings{Ungureanu18:DATE,
author = {Ungureanu, George and de Medeiros, Jose E. G. and Sander, Ingo},
booktitle = {PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE) : },
institution = {KTH, Electronics},
institution = {Univ Brasilia, Elect Engn Dept, Brasilia, DF, Brazil.},
note = {QC 20180904},
pages = {277--280},
publisher = {IEEE},
title = {Bridging Discrete and Continuous Time Models with Atoms},
series = {Design Automation and Test in Europe Conference and Exhibition},
abstract = {Recent trends in replacing traditionally digital components with analog counterparts in order to overcome physical limitations have led to an increasing need for rigorous modeling and simulation of hybrid systems. Combining the two domains under the same set of semantics is not straightforward and often leads to chaotic and non-deterministic behavior due to the lack of a common understanding of aspects concerning time. We propose an algebra of primitive interactions between continuous and discrete aspects of systems which enables their description within two orthogonal layers of computation. We show its benefits from the perspective of modeling and simulation, through the example of an RC oscillator modeled in a formal framework implementing this algebra. },
ISBN = {978-3-9819-2630-9},
year = {2018}
}
@inproceedings{Medeiros18:DATE,
author = {de Medeiros, Jose. E. G. and Ungureanu, George and Sander, Ingo},
booktitle = {PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE) : },
institution = {KTH, Electronics},
institution = {Univ Brasilia, Dept Elect Engn, Brasilia, DF, Brazil.},
note = {QC 20180905QC 20181010},
pages = {861--864},
title = {An Algebra for Modeling Continuous Time Systems},
series = {Design Automation and Test in Europe Conference and Exhibition},
DOI = {10.23919/DATE.2018.8342126},
abstract = {Advancements on analog integrated design have led to new possibilities for complex systems combining both continuous and discrete time modules on a signal processing chain. However, this also increases the complexity any design flow needs to address in order to describe a synergy between the two domains, as the interactions between them should be better understood. We believe that a common language for describing continuous and discrete time computations is beneficial for such a goal and a step towards it is to gain insight and describe more fundamental building blocks. In this work we present an algebra based on the General Purpose Analog Computer, a theoretical model of computation recently updated as a continuous time equivalent of the Turing Machine. },
URL = {https://www.date-conference.com/date18/},
ISBN = {978-3-9819-2630-9},
year = {2018}
}
@inproceedings{Rosvall18:DSD,
author = {Rosvall, Kathrin and Mohammadat, Tage and Ungureanu, George and {\"O}berg, Johnny and Sander, Ingo},
booktitle = { : },
institution = {KTH, School of Electrical Engineering and Computer Science (EECS)},
institution = {KTH, Electronics},
institution = {KTH, Electronic and embedded systems},
note = {QC 20181114},
title = {Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors},
DOI = {10.1109/DSD.2018.00011},
abstract = {System level optimization for multiple mixed-criticality applications on shared networked multiprocessor platforms is extremely challenging. Substantial complexity arises from the interdependence between the multiple subproblems of mapping, scheduling and platform configuration under the consideration of several, potentially orthogonal, performance metrics and constraints. Instead of using heuristic algorithms and problem decomposition, novel unified design space exploration (DSE) approaches based on Constraint Programming (CP) have in the recent years shown promising results. The work in this paper takes advantage of the modularity of CP models, in order to support heterogeneous multiprocessor Network-on-Chip (NoC) with Temporally Disjoint Networks (TDNs) aware message injection. The DSE supports a range of design criteria, in particular the optimization and satisfaction of power and throughput. In addition, the DSE now provides a valid configuration for the TDNs that guarantees the performance required to fulfil the design goals. The experiments show the capability of the approach to find low-power and high-throughput designs, and validate a resulting design on a physical TDN-based NoC implementation. },
ISBN = {978-1-5386-7377-5},
year = {2018}
}
@inproceedings{Ungureanu17:DATE,
author = {Ungureanu, George and Sander, Ingo},
booktitle = {Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017 : },
institution = {KTH, Electronics},
note = {QC 20170626},
pages = {1715--1720},
eid = {7927270},
title = {A layered formal framework for modeling of cyber-physical systems},
DOI = {10.23919/DATE.2017.7927270},
abstract = {Designing cyber-physical systems is highly challenging due to its manifold interdependent aspects such as composition, timing, synchronization and behavior. Several formal models exist for description and analysis of these aspects, but they focus mainly on a single or only a few system properties. We propose a formal composable framework which tackles these concerns in isolation, while capturing interaction between them as a single layered model. This yields a holistic, fine-grained, hierarchical and structured view of a cyber-physical system. We demonstrate the various benefits for modeling, analysis and synthesis through a typical example. },
ISBN = {9783981537093},
year = {2017}
}
@inproceedings{Rosvall17:RAPIDO,
author = {Rosvall, Kathrin and Khalilzad, Nima and Ungureanu, George and Sander, Ingo},
title = {Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems},
booktitle = {Proceedings of the 2017 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, {RAPIDO '17}, Stockholm, Sweden},
year = {2017},
month = {January},
publisher = {ACM},
documenturl = {http://dl.acm.org/citation.cfm?id=3023977}
}
@article{Ungureanu13:NIP,
title={Parallel Software Design Enabling High-Speed Reliability Testing of Inkjet Printheads},
author={Ungureanu, George and Reinhold, Ingo and Sander, Ingo and Zapka, Werner},
journal={NIP \& Digital Fabrication Conference},
volume={2013},
number={1},
pages={60--65},
year={2013},
publisher={Society for Imaging Science and Technology}
}
@mastersthesis{Ungureanu13:MSc,
author = {Ungureanu, George},
institution = {KTH, School of Information and Communication Technology (ICT)},
pages = {151},
school = {KTH, School of Information and Communication Technology (ICT)},
title = {Automatic Software Synthesis from High-Level {ForSyDe} Models Targeting Massively Parallel Processors},
series = {Trita-ICT-EX},
number = {2013:139},
year = {2013}
}