| I/O pins | Direction | Signal | Purpose | |||
|---|---|---|---|---|---|---|
| GP[27] | Input | Sensor IRQ | Interrupt output from UCB1200 | |||
| GP[26] | Output | IRSD | IRDA transceiver SD | |||
| GP[25] | Output | PRESET | PCMCIA Reset | |||
| GP[24] | Output | PCMEN5V | enable 5V for PCMCIA (drives SHDN2- on MAX863) | |||
| GP[23] | Input | FLSHSTAT | Flash RY-/BY- output [not on Intel chips] | |||
| GP[22] | Input | PSKT0STCH~ | PCMCIA 0 status change | |||
| GP[21] | not connected | |||||
| GP[20] | UART_SCLK3 | |||||
| GP[19] | not connected | |||||
| GP[18] | UART_SCLK1 | |||||
| GP[17] | SDLC_AAF | |||||
| GP[16] | SDLC_SCLK | |||||
| GP[15] | UART_RXD | |||||
| GP[14] | UART_TXD | |||||
| GP[13] | PSKT1INT~ | PCMCIA 1 interrupt JP4 pin 36 | ||||
| GP[12] | PSKT1CD~ | PCMCIA 1 Card Detect JP4 pin 37 | ||||
| GP[11] | PSKT0INT~ | PCMCIA 0 interrupt (PCMIREQ~) | ||||
| GP[10] | PSKT0CD~ | PCMCIA 0 Card Detect (PCMCD1~ or PCMCD1~) | ||||
| GP[9] | JP5 pin 21 | |||||
| GP[8] | JP5 pin 20 | |||||
| GP[7] | JP5 pin 19 | |||||
| GP[6] | JP5 pin 18 | |||||
| GP[5] | JP5 pin 17 | |||||
| GP[4] | JP5 pin 16 | |||||
| GP[3] | JP5 pin 15 | |||||
| GP[2] | JP5 pin 14 | |||||
| GP[1] | Output | Flash Write Protext (WP) | ||||
| GP[0] | Output | FLSHRP~ | Flash Reset/Deep Power-down (RP) |
WP =
locking and unlocking the two lockable parameter blocks
logic low, the lockable blocks are locked,
logic high, the lockable blocks are unlocked
RP =
logic low, the device is in reset/deep power-down mode
logic high, the device is in standard operation.
transitions from logic-low to logic-high,the device resets all blocks to locked and defaults to the
read array mode.