WALKSTATION INTEGRATION WALKSTATION INTEGRATIONThe objectives of this subproject is to study the implementation integration of advanced high data rate wireless terminals and to develope necessary prototypes for other research partners in order to facilaite complete system level demonstrator for the WALKSTATION project.
High data rate (2-10 Mbit/s) will require new type of receiver/transmitter architectures compared to digital wireless systems oriented towards speech. In our case the central focus is on spread spectrum requirements for radio electronics, especially with respect to forward error correction and capability of using multiple channels.
Forward error correction is needed to decrease the bit error rate. A number of parity bits is added to a dataword which will give it some redundancy and then transmitted. At the receiving end the most probable correct dataword is calculated. This can be done if the number of errors don't exceed the correction capability of the code. The problem in this case is the high datarates which makes it desirable to incorporate it in hardware. To manage bursts of errors interleaving should be used (software/hardware?).
In a multiple channel receiver several transmitting stations can be received in parallel (and several paths of one transmission if they are separated in time with more than one chip). This would make it easier to decide when to switch to another base station and it would also make it possible to have active interference cancellation
From final integration point of view, new receiver architectures based on early digital conversion and DSP are studied and demonstrated for wide bandwidth spread spectrum wireless systems. Research focus is on direct conversion receivers and also new architectures based on subband sampling or bandpass sampling will be developed. Necessary dedicated DSP filter architectures based on Saramaki class of filters will be studied and evaluated.
The radio system architecture need to be based on configurable hardware where appropriate hardware resources are utilized as needed/requested at the system level. The first versions will be based on high power FPGA logic; however, more dedicated low power VLSI oriented structures are developed and demonstrated in parallel. The critical issue here is to provide fast turnaround times for implementing changes and modifications provided by the other research partners in application or protocol side.
On longer term perspective we will work towards integrating GPS and multistandard radio systems (dattaterminal which can utlize also GSM or other wireless channels when normal high data rate channel is not avialable)
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